Design of capless LDO regulator with low voltage application based ESD protection circuit using SR-latch switch structure
نویسندگان
چکیده
The transient response characteristics such as overshoot and undershoot can be affected by the external capacitors of LDO regulator. However, capacitor-less regulator proposed in this paper has an SR-Latch switch structure applied to output terminal gate pass transistor order achieve improved secure excellent current driving capability. In addition, ESD protection device uses Penta-Well low voltage applications embedded stage power line based on SCR (Silicon Control Rectifier) provide robustness characteristics. As a result, with were quiescent was secured. operating conditions set input 3.3V 4.5V, maximum load 250mA, 3V. result measurement, it confirmed that maintained 42mV 31mV when 250mA applied. HBM is guaranteed at 6kV.
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ژورنال
عنوان ژورنال: IEICE Electronics Express
سال: 2022
ISSN: ['1349-2543', '1349-9467']
DOI: https://doi.org/10.1587/elex.19.20220221